Due to the development of digital technology most processing in communication system transceivers should be performed in discrete time domain. Following this modern trends, in this Project, a Prototype of a Direct Sequence Spread Spectrum System (DS-SSS) Transceiver will be designed and developed primarily in FPGA technology. The Prototype will be based on the theoretical model of the system and its simulator. Therefore, the initial step will be to acquire necessary knowledge and skills in mathematical modelling and simulation of the system in MATLAB based on the previous work in ECE Department. The DS-SSS system simulator will be based on the mathematical model of the entire system in discrete time domain that will be developed for various channel conditions including a narrowband channel and, possibly, a wideband channel emulator. The operation of the Prototype will be demonstrated on an example of the standard Marina’s picture transmission and audio signal transmission.
Undergraduate
DS-SSS Transceiver Prototype.
It is advisable that at least one student is enrolled in Communication Systems and Digital Communications courses. It is also advisable to have one student doing CSE degree. Enrolment into Signal Processing is a great advantage.
It is strongly advised that the candidates for this project talk to the supervisor before taking the project in order to understand the project requirements.
Lab allocations have not been finalised