The University of Auckland

Project #16: Time Predictable Processor Design for Artificial Neural Networks



Safety-critical embedded systems must conform to both functional and timing correctness. Timing correctness has historically been difficult to verify using static timing analysis due to complex speculative hardware in conventional processor architectures. To overcome this, several time-predictable processors such as T-CREST and ARPRET have been developed to specialise in time predictable execution. Artificial Neural Networks (ANN) are increasingly being used in safety-critical applications such as decision making for autonomous vehicles. These ANNs are commonly implemented on conventional processor architectures making worst-case execution time (WCET) difficult to calculate using formal methods, presenting potentially dangerous edge cases. Specialised ANNs such as Synchronous Artificial Neural Networks (SANN) have been applied to time-predictable embedded systems before, however few solutions exist for execution of more common general ANNs such as models produced by KERAS. We propose a time predictable processor architecture which specialises in the execution of ANNs, to improve performance compared with traditional time-predictable architectures. This architecture would build off the Patmos processor and include specialised hardware and instructions for executing ANNs while remaining time-predictable and reactive. Our research would make time-predictable architectures more viable for AI-based embedded applications in industry. This would be achieved by making performance more competitive with traditional embedded platforms, and by reducing WCET compared to other time predictable architectures.











Lab allocations have not been finalised