A new concurrent programming language called SystemGALS proposed within Embedded Systems Research Group, which can be considered an extension of C programming language, but with formal mathematical foundation, requires new computer platforms to efficiently execute concurrent programs that mix reactive behaviours with more elaborate data processing/computations.
The project will focus on the key building block, a tandem processor that a in-house developed reactive processor and Intel’s Nios 2 processor (or its new RISC-V based Intel version). The new processor is referred to as ReactiveNiOS. In its first incarnation of ReactiveNiOS, NiOS will be considered the main processor and reactive processor will be considered its co-processor. Programming the ReactiveNiOS tandem will be done through NiOS programming tools, and the ReCOP instructions will be made available for use as the extended NiOS instruction set.
Undergraduate
Understanding of SystemGALS programming language and its model of computation to design the target ReactiveNiOS and its basic run-time system (RTS)
Develop ReactiveNiOS as a NiOS+ReCOP tandem processor that has NiOS instruction set extended with a set of reactive operations/instructions
Explore the basic up to four ReactiveNiOS core multi-core system configuration with a time-predictable Network-on-Chip (existing, developed in-house) which allows executing SystemGALS-type programs
Demonstrate the execution of an example program on the selected control system of students’ choice (some motivating examples will be offered)
Knowledge (as a union of skills of two students or need to be acquired):
Skills to design digital systems using VHLD and RTL-level specifications, system-level programming for embedded devices using C, ability to develop/extend an existing assembler/compiler to support reactive instruction set
Corequisite is enrolment into COMPSYS 701 (Advanced Digital Design)
Embedded Systems (405.760, Lab)