The project focuses on the development of a time-predictable computer architecture that incorporates traditional and custom processors, as well as application-specific processors. The platform will be suitable for combined control- and data-dominated embedded systems that rely on ability to deal with time and safety critical reactive applications that also include significant use of digital signal processing.
The project will explore the architectural alternatives of satisfying the reactive and data processing requirements of the advanced embedded systems and result in the development of that execution platform based on time-predictable Network-on-Chip (NoC) that accommodates between 8 and 16 nodes (cores).
Undergraduate
Analysis of the needs of advanced mixed applications and converting their requirements into the required features of the platform
Using a motivational example that includes a combination of event drive behaviours and signal processing (on single-dimensional or two-dimensional signals, e.g. images) to demonstrate the feasibility of the approach
Build an initial instance of the architecture and platform on an FPGA-based development kit
Knowledge (as a union of skills of two students or need to be acquired):
Skills to design digital systems using VHLD and RTL-level specifications, system-level programming for embedded devices using C, ability to develop/extend an existing assembler/compiler to support reactive instruction set
Corequisite is enrolment into COMPSYS 701 (Advanced Digital Design)
Embedded Systems (405.760, Lab)